1. Technical Field
The present disclosure relates to a method and circuitry for detecting a fault attack, and in particular to a method and circuitry for detecting a fault attack relating to at least one register.
2. Description of the Related Art
Integrated circuits may comprise circuitry that is considered sensitive in view of the security of the data it manipulates, such as authentication keys, signatures, etc., or in the algorithms it uses, such as encryption or decryption algorithms. Such information is desired to be kept secret, meaning that it should not be communicated to, or otherwise be detectable by, third parties or unauthorized circuits.
A common process for pirating information manipulated by integrated circuits consists in detecting the zones of the circuit that are used during the processing of that information. For this, the integrated circuit is activated or placed in a functional environment, and data is introduced at an input. While the data is being processed, the surface of integrated circuit is swept by a laser to inject faults in the functioning of the circuit. By analyzing in parallel the outputs of the circuit, this enables the zones of the circuit that process the data to be determined. Having localized these zones, the pirate can concentrate attacks on these zones in order to determine the secret data being processed.
During the processing of sensitive data by an integrated circuit, the data is temporarily stored in registers, and such registers are particularly vulnerable to fault analysis attacks. In order to protect registers against a fault attack, one option would be to replace each register by two identical registers with the same address, and to continuously compare the data stored in these registers. However, such a solution is not effective in many situations. For example a fault injected on the common address bus or on a common reset path can not be detected, because it will affect the identical registers in the same way.
Therefore, there is a need for an improved method and circuit that is more effective in detecting a fault attack against a register.